VLSI Analog Architect

  • Wipro
  • Hillsboro - Oregon,USA
  • Jul 06, 2018

Job Description

Mandatory Skills:
VLSI HVL Verification

Job Description:

Should have SoC and IP level Functional Verification experience of 10 Yrs.

Should have good ASIC/SOC System Level Architecture knowledge

Strong understanding of verification process from test plan to coverage completion

Knowledge of processor architecture and verification is a plus.

Strong communication and Analytical skills

Proficient in debugging and issue fixing

Ability to lead and coordinate multi-site teams.


Expert in System Verilog based Test Bench Architecture development

Good hands-on on SV-UVM based Test environment components implementation such as SV Testbench, drivers, monitors, scoreboards, checkers

Familiar with System Verilog Assertions, Code and Functional Coverage and Formal verification techniques.

Experience in setup and debug of gate level simulation

Knowledge of low power verification

DFX validation is a plus

Knowledge of synopsys tools is desired


Strong working knowledge of any of these protocols: DDR, USB, PCIe, Ethernet, SATA,AXI...

Roles & Responsibilities:
Minimum Experience Required:
Mandatory Skills: VLSI HVL Verification Analog Circuit design, Hardware Designing, Analog and Mixed signal Verification
Desirable Skills:
Language Skills: English Language